Typically, in the manufacturing process of a semiconductor device such as a transistor, an insulating film or a metal film is formed on a substrate, e.g., a semiconductor wafer and, then, the formed film is processed into a desired shape by forming a pattern by employing a photolithographic technique and etching. In the manufacturing process, a film forming process using CVD (Chemical Vapor Deposition), a dry etching process, an asking process and the like are repeated. Almost all of these processes need to be performed under a vacuum environment. For that reason, a vacuum device including a pressure resistant vessel, an exhaust unit and the like is necessary for the manufacturing process of the semiconductor device. Since, however, a vacuum device in use for a film forming process or an etching process is a type of a large scale, there has been a demand for developing a method of manufacturing a semiconductor device simply without using a large-scale vacuum device.
In the meantime, there has been disclosed a method for forming a metal film by using polysilane having a high reducibility (see, e.g., Japanese Patent Application Publication No. 2002-105656). Specifically, a substrate having a surface on which a polysilane film is formed is processed by using a solution containing metal salts formed of a metal whose standard oxidation reduction potential is 0.54 eV or higher to solidify a corresponding metal colloid on the surface of the substrate, and an electroless plating is carried out by using the metal colloid as a plating core so as to form a metal film. In such a metal film forming method, in a base of the metal film, poly silane is oxidized into insulating polysiloxane. However, there has been no clear suggestion about what use is made of a stacked film having such conductive layer and insulating layer.